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compact, precision six degrees of freedom inertial sensor data sheet adis1644 5 rev. 0 document f eedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its us e. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology w ay, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2012 analog devices, inc. all rights reserved. technical support www.analog.com features triaxial digital gyroscope with digital range scaling 62 /sec, 125 /sec, 25 0 /sec settings axis - to - axis align ment, <0.05 triaxial digital accelerometer, 5 g minimum autonomous operation and data collection no external configuration commands r equired 175 ms start - up time factory calibrated sensitivity, bias, and axial alignment calibration t emperature ran ge: ?40c to + 70 c spi - compatible serial interface embedded temperature sensor programmable operation and control automatic and manual bias correction controls bartlett window fir length, number of taps digital i/o: data ready, alarm indicator, general - pu rpose alarms for condition monitoring enable external sample clock input up to 1. 1 khz single command self test single - supply operation: 3. 15 v to 3. 45 v 2000 g shock survivability operating temperature range: ?40c to + 8 5 c applications platform stabiliza tion and control navigation robotics general description the ADIS16445 i sensor ? device i s a complete inertial system that include s a triaxial gyroscope and a triaxial accelerometer . each sensor in the ADIS16445 c ombines industry - leading i mems? technology with signal conditioning that optimizes dynamic performance. the factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear accel - eration (gyro scope bias). as a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements. the ADIS16445 provide s a simple, cost - effective method for integrating ac curate, multiaxis inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. all necessary motion testing and calibration are part of the production process at the factory, greatl y reducing system integration time. tight orthogonal alignment simplifies inertial frame alignment in navigation systems. the spi and register structure s provide a simple interface for data collection and configuration control. the ADIS16445 has a compatible pinout for systems that currently use other a nalog d evices, i nc., imu products (adis163xx/ adis16 4xx). the ADIS16445 is packaged in a module that is approximat ely 24.1 mm 37.7 mm 10.8 mm and has a standard connector interface. functional block dia gram controlller clock triaxial gyro triaxial accel power management cs sclk din dout gnd vdd temp vdd dio1 dio2 dio3 dio4 rst spi self test i/o alarms output data registers user control registers calibration and filters ADIS16445 1 1051-001 figure 1. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing specifications .................................................................. 5 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 user registers .................................................................................... 9 user interface .................................................................................. 10 reading sensor data .................................................................. 10 device configuration ................................................................ 11 output data register s .................................................................... 12 gyroscopes .................................................................................. 12 accelerometers ............................................................................ 12 internal temperature ................................................................. 13 system functions ............................................................................ 14 global commands ..................................................................... 14 product identification ................................................................ 14 self - test function ....................................................................... 14 status/error flags ....................................................................... 15 memory management ............................................................... 15 input/output configuration ......................................................... 16 data ready indicator ................................................................. 16 general - pur pose input/output ................................................ 16 digital processing configuration ................................................. 17 gyroscopes/accelerometers ..................................................... 17 input clock configuration ....................................................... 17 calibration ....................................................................................... 18 gyroscopes .................................................................................. 18 accelerometers ........................................................................... 18 flash updates .............................................................................. 19 restoring factory calibration .................................................. 19 alarms .............................................................................................. 20 static alarm use ......................................................................... 20 dynamic alarm use .................................................................. 20 alarm reporting ........................................................................ 20 applications information .............................................................. 21 power supply considerations ................................................... 21 ADIS16445/pcbz ...................................................................... 21 pc - based evaluation tools ....................................................... 21 mounting approaches ............................................................... 21 outline dimensions ....................................................................... 23 ordering guide .......................................................................... 23 revision history 10/ 1 2 revision 0: initial version www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 3 of 24 specifications t a = 2 5c, v dd = 3.3 v , angular rate = 0/s ec, dynamic range = 250 /s ec 1 g , unless otherwise noted. table 1 . parameter test conditions /comments min typ max unit gyroscopes dynamic range 250 /sec initial sensitivity 250 /sec , se e table 12 0.0099 0.01 0.0101 /sec/lsb 125 /sec 0.005 /sec/lsb 6 2 /sec 0.0025 /sec/lsb sensitivity temperature coefficient ? 40c t a +70c 40 ppm/c misalignment axis to axis 0.05 degrees axis to frame (package) 0.5 degrees nonlinearity best fit straight line 0.1 % of fs initial bias error 0.5 /sec in - run bias stability 1 , smpl_prd = 0x0001 12 /hr angular random walk 1 , smpl_prd = 0x0001 0.56 /hr bias temperature coefficie nt ? 40c t a +85c 0.005 /sec/c linear acceleration effect on bias any axis, 1 (msc_ctrl[ 6 ] = 1) 0. 015 /sec/ g bias supply sensitivity +3.15 v vdd +3.45 v 0.2 /sec/v output noise 2 50 /sec range, no filtering 0 .2 2 /sec rms rate noise density f = 25 hz, 250 /sec range, no filtering 0.01 1 /sec/hz rms ? 3 db bandwidth 330 hz sensor resonant frequency 17.5 khz accelerometers each axis dynamic range 5 g initial sensitivity see table 16 for data format 0.2475 0.25 0.2525 m g /lsb sensitivity temperature coefficient ? 40c t a +70c 4 0 ppm/c misalignment axis to axis 0.2 degrees axis to frame (package) 0.5 degrees nonlinearity best fit straight line 0.2 % of fs initial bias error 8 m g in - run bias stability 1 , smpl_prd = 0x0001 0. 075 m g velocity random walk 1 , smpl_prd = 0x0001 0. 073 m/sec/hr bias temperature coefficient ? 40c t a +85c 0. 04 m g /c bias supply sensitivity +3.15 v vdd +3.45 v 1.5 m g / v output noise no filtering 2.25 m g rms noise density no filtering 0. 105 m g /hz rms ? 3 db bandwidth 330 hz sensor resonant frequency 5.5 khz temperature sensitivity see table 17 0.07386 c/lsb logic inputs 1 input high voltage, v ih 2.0 v input low voltage, v il 0.8 v logic 1 input current, i ih v ih = 3.3 v 0.2 10 a logic 0 input current, i il v il = 0 v all pins except rst 40 60 a rst pin 1 ma input capacitance, c in 10 pf www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 4 of 24 parameter test conditions /comments min typ max unit digital outputs 1 output high voltage, v oh i source = 1.6 ma 2.4 v output low voltage, v ol i sink = 1.6 ma 0.4 v flash memory endurance 2 10,000 cycles data retention 3 t j = 85c 20 years functional times 4 time until new data is available power - on start - up time 175 ms reset recovery time 55 ms flash memory back - up time 55 ms flash memory test time 20 ms automatic self - test time smpl_prd = 0x0001 16 ms conversion rate xgyro_out, xaccl_out smpl_prd = 0x0001 819.2 sps clock accuracy 3 % sync input clock 5 0.8 1.1 khz power supply operating voltage range, vdd 3.15 3.3 3.45 v power supply current vdd = 3.15 v 74 ma 1 the digital i/o signals are driven by an internal 3.3 v supply , and the inputs are 5 v tolerant. 2 endurance is qualified as per jedec standard 22 , method a117 , and measured at ? 40c , +25 c , +85 c, and +125 c . 3 the data r etention lifetime equivalent is at a junction temperature (t j ) of 8 5 c as per jedec s tandard 22, method a117. data r etention lifetime decreases with junction temperature. 4 these times do not include thermal set tling and internal filter response times (330 hz bandwidth), which may affect overall accuracy. 5 the sync input clock functions below the specified minimum value but at reduced performance levels. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 5 of 24 timing specification s t a = 25c, vdd = +3.3 v, unless otherwise noted. table 2 . parameter description normal mode burst read unit min 1 typ max min 1 typ max f sclk s erial clock 0.01 2.0 0.01 1.0 mhz t stall stall period between data 9 n/a 2 s t readrate read rate 40 s t cs chip select to sclk edge 48.8 48.8 ns t dav dout valid after sclk edge 100 100 ns t dsu din setup time before sclk rising edge 24.4 24.4 ns t dhd din hold time after sclk rising edge 48.8 48.8 ns t sclkr , t sclkf sclk rise/fall times , not shown in timing diagrams 5 12.5 5 12.5 ns t dr , t df dout rise/fall times , not shown in timing diagrams 5 12.5 5 1 2.5 ns t sfs cs high after sclk edge 5 5 ns t 1 input sync positive pulse width 25 25 s t s t dr input sync to data ready valid transition 670 670 s t nv data in valid time 210 210 s t 3 input sync period 910 910 s 1 guaranteed by design and characterization, but not teste d in production . 2 when using the burst read mode, the stall period is not applicable . timing diagrams cs sclk dout din 1 2 3 4 5 6 15 16 r/w a5 a6 a4 a3 a2 d2 msb db14 d1 lsb db13 db12 db10 db 1 1 db2 lsb db1 t cs t sfs t da v t dhd t dsu 1 1051-002 figure 2 . spi timing and sequence cs sclk t readr a te t st al l 1 1051-003 figure 3 . stall time and data rate clock data ready t 1 t 3 t nv t stdr 1 1051-004 figure 4 . input clock timing diagram www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 6 of 24 absolute maximum rat ings table 3 . parameter rating acceleration any axis, unpowered 2000 g any axis, powered 2000 g vdd to gnd ? 0.3 v to + 3. 45 v digital input voltage to gnd ? 0.3 v to + vdd + 0.3 v digital output voltage to gnd ? 0.3 v to + vdd + 0.3 v temperature operating range ? 40c to + 8 5 c storage range ? 65c to +125c 1, 2 1 extended exposure to temperatures outside the specified temperature range of ?40c to +105c can adversely affect the accuracy of the factory calibration. for best accuracy, store the parts within the specified operating range of ?40c to +105c. 2 although the device is capable of withstanding short - term exposure to 150c, long - term exposure threatens internal mechanical integrity. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at th ese or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 4 . package c haracteristics package type ja (c/w) jc (c/w) mass (grams) 2 0 - lead module (ml -2 0 -3 ) 36.5 16.9 1 5 esd caution www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 7 of 24 pin configuration an d function descripti ons 19 dio4/clkin dout cs rst vdd dio2 gnd dnc dnc dnc dio3 sclk din dio1 vdd vdd gnd gnd dnc dnc 20 17 18 15 16 13 14 11 12 9 10 7 8 5 6 3 4 1 2 ADIS16445 top view (not to scale) notes 1. this representation displays the top view when the connector is visible and facing up. 2. mating connector: samtec clm-110-02 or equivalent. 3. dnc = do not connect. 1 1051-005 figure 5 . pin configuration pin 1 pin 20 1 1051-006 figure 6. pin locations table 5 . pin function descriptions pin no. mnemonic type 1 description 1 dio3 i/o configurable digital input/output. 2 dio4/clkin i/o configurable digital input/output or sync clock input. 3 sclk i spi se rial clock. 4 dout o spi data output. clocks the output on the sclk falling edge. 5 din i spi data input. clocks the input on the sclk rising edge. 6 cs i spi chip select. 7 dio1 i/o configurable digital input/output. 8 rst i reset. 9 dio2 i/o configurable digital input/output. 10, 11, 12 vdd s power supply. 13, 14, 15 gnd s power ground. 16, 17, 18, 19 , 20 dnc n/a do not connect. do not connect to these pins. 1 s is supply, o is output, i is input, n/a is not applicable. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 8 of 24 typical performance characteristics 1000 100 10 1 0.01 0.1 1 10 10k 1k 100 root allan variance (/hour) tau (seconds) 11051-007 + average C figure 7 . gyroscope root allan variance 0.01 0.1 1 10 0.01 0.1 1 10 100 10k 1k root allan variance (m g) tau (seconds) 11051-008 average + C figure 8 . accelerometer root allan variance www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 9 of 24 user registers table 6 . user register memory map name r/w flash backup address 1 default function bi t assignments flash_cnt r yes 0x00 n/a flash memory write count see table 26 reserved n/a n/a 0x02 n/a n/a n/a xgyro_out r no 0x04 n/a x - axis gyroscope output see table 9 ygyro_out r no 0x06 n/a y - axis gyroscope output see table 10 zgyro_out r no 0x08 n/a z - axis gyroscope output see table 11 xaccl_out r no 0x0a n/a x - axis accelerometer output see table 13 yaccl_out r no 0x0c n/a y - axis accelerometer output see table 14 zaccl_out r no 0x0e n/a z - axis accelerometer output see table 15 reserved n/a n/a 0x10 to 0x16 n/a reserved n/a temp_out r no 0x18 n/a temperature output see table 17 xgyro_off r/w yes 0x1a 0x0000 x - axis gyroscope bias offset factor see table 30 ygyro_off r/w yes 0x1c 0x0000 y - axis gyroscope bias offset factor see table 31 zgyro_off r/w yes 0x1e 0x0000 z - axis gyroscope bias offset factor see table 32 xaccl_off r/w yes 0x20 0x0000 x - axis acceleration bias offset factor see table 33 yaccl_off r/w yes 0x22 0x0000 y - axis acceleration bias offset factor see table 34 zaccl_off r/w yes 0x24 0x0000 z - axis acceleration bias offset factor see table 35 reserved n/a n/a 0x26 to 0x30 n/a reserved n/a gpio_ctrl r/w no 0x32 0x0000 auxiliary digital input/output contr ol see table 27 msc_ctrl r/w yes 0x34 0x0006 miscellaneous control see table 24 smpl_prd r/w yes 0x36 0x0001 internal sample period (rate) control see table 28 sens_avg r/w yes 0x38 0x0402 dynamic range and digital filter control see table 29 reserved n/a n/a 0x3a n/a reserved n/a diag_stat r no 0x3c 0x0000 system status see table 25 reserved n/a n/a 0x3a n/a reserved n/a glob_cmd w n/a 0x3e 0x0000 system command see table 19 alm_mag1 r/w yes 0x40 0x0000 alarm 1 amplitude threshold see table 36 alm_mag2 r/w yes 0x42 0x0000 alarm 2 amplitude threshold see table 37 alm_smpl1 r/w yes 0x44 0x0000 alarm 1 sample size see table 38 alm_smpl2 r/w yes 0x46 0x0000 alarm 2 sample size see table 39 alm_ctrl r/w yes 0x48 0x0000 alarm control see table 40 reserved n/a n/a 0x4a to 0x51 n/a reserved n/a lot_id1 r yes 0x52 n/a lot identification number see table 20 lot_id2 r yes 0x54 n/a lot identification number see table 21 prod_id r yes 0x56 0x40 3d product identifier see table 22 serial_num r yes 0x58 n/a lot - specific serial number see table 23 1 each register contains two bytes. the address of the lower byte is displayed. the address of the upper b yte is equal to the address of the lower byte plus 1. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 10 of 24 user interface the ADIS16445 is an autonomous system th at requires no user initialization. when it has a valid power supply, it initializes itself and starts sampling, processing , and loading sensor data into the output registers at a sample rate of 819.2 sps. dio1 pulses high after each sample cycle concludes . the spi interface enables simple integration with many embedded processor platforms , as shown in figure 9 (electrical connection) and table 7 (pin functions ). system processor spi master ADIS16445 sclk cs din dout sclk ss mosi miso +3.3v irq dio1 vdd i/o lines are com pa tible with 3.3v or 5v logic levels 10 6 3 5 4 7 1 1 12 13 14 15 1 1051-009 figure 9 . electrical connection diagra m table 7 . generic master processor pin names and function s pin name function ss slave select sclk serial clock mosi master output, slave input miso master input, slave output irq interrupt request the ADIS16445 spi interface supports full duplex serial commu - ni cation (simultaneous transmit and receive) and uses the bit sequence shown in figure 12. table 8 provides a list of the most common settings that require attention to initialize the serial port of a processor for the ADIS16445 spi interface. table 8 . generic master processor spi settings processor setting description master the ADIS16445 operate s a s a slave sclk rate 2 mhz 1 maximum serial clock rate spi mode 3 cpol = 1 (polarity), cph a = 1 (phase) msb -f irst mode bit sequence 16- bit mode shift register/data length 1 for burst read , sclk rate 1 mhz. r ead ing sensor data the ADIS16445 provides two different options for acquiring sensor data: a single register and a burst register . a single register read requires two 16 - bit spi cycles . the first cycle requests the contents of a register using the bit assignment s in figure 12. bit dc7 to bit dc0 are dont care s for a read , and then the output register contents follow on dout during the second sequence . figure 10 includes three sin gle register reads in succession . in this example, the process starts with din = 0x0400 to request the contents of xgyro_out, then follows with 0x0600 to request ygyro_out , and 0x0800 to request zgyro_out . full duplex operation enables processors to use t he same 16 - bit spi cycle to read data from dout while requesting the next set of data on din . figure 11 provides an example of the four spi signals when reading xgyro_out in a repeating pattern. xgyro_out din dout ygyro_out zgyro_out 0x0400 0x0600 0x0800 1 1051-010 figure 10 . spi read example sclk cs din dout dout = 1111 10011101 1010 = 0xf9da = C15.74/sec lsbs C62.96/sec din = 0000 0100 0000 0000 = 0x0400 1 1051-0 1 1 figure 11 . example spi read, second sequence , sens_avg[15:8] = 0x04 r/w r/w a6 a5 a4 a3 a2 a1 a0 dc7 dc6 dc5 dc4 dc3 dc2 dc1 dc0 d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d 1 1 d12 d13 d14 d15 cs sclk din dout a 6 a 5 d13 d14 d15 notes 1. the dout bit pa ttern reflects the entire contents of the register identified b y [a6:a0] in the previous 16-bit din sequence when r/w = 0. 2. if r/w = 1 during the previous sequence, dout is not defined. 1 1051-012 figure 12 . spi communication bit sequence www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 11 of 24 burst read function the burst read function enables the user to read all output registers using one command on the din line , 0x3e00. when using this mode, one can read all of the data in one continuous stream of bits (no stall time between each register). after the 0x3e00 command, use 12 sequential, 16 - bit read commands to complete the sequence (din is dont care after 0x3e00). figure 13 provides the burst read sequence of data on each spi signal. the sequence starts with writing 0x3e00 to din, followed by each ou tput register clocking out on dout, in the order in which they appear in figure 12. glob_cmd cs sclk din dout xgyro_out diag_s ta t temp_out 1 1051-013 1 2 3 9 figure 13 . burst read sequence spi read test sequence figure 14 provides a te st pattern for testing the spi communica - tion . in this pattern, write 0x5600 to the din line in a repeating pattern and raise chip select for at least 9 s between each 16 - bit sequence. starting with the second 16 - bit sequence, dout produce s the contents o f the prod_id register, 0x40 3 d (see table 22) . dout = 0100 0000 00 1 1 1 101 = 0x403d = 16,445 din = 0101 0 1 10 0000 0000 = 0x5600 sclk cs din dout 1 1051-014 figure 14 . spi test read pattern din = 0x5600, dout = 0x40 3d device configuration the control registers in table 6 provide us ers with a variety of configuration options. the spi provides access to these registers, one byte at a time, using the bit assignments in figure 12 . each register has 16 bits, where bits[7:0] represent the lower ad dress, and bits[15:8] represent the upper address . figure 15 provides an example of writing 0x0 4 to address 0x3 7 (smpl_prd[15:8], using din = 0xb 7 04) . this example reduces the sample rate by a factor of eight (see table 28). sclk cs din din = 10 1 1 0 11 1 0000 0100 = 0xb704, writes 0x04 t o address 0x37. 1 1051-015 figure 15 . example spi write sequence dual memory structure writing configuration data to a control register updates its sram contents, which are volatile. after optimizing each relevant cont rol register setting in a system, set glob_cmd[3] = 1 (din = 0xbe08) to back up these settings in nonvolatile flash memory. the flash backup process requires a valid power supply level for the entire process time , 75 ms . table 6 p rovides a user register memory map that inc ludes a flash backup column. a y es in this column indicates that a register has a mirror location in flash and, when backed up properly, it automatically restores itself during startup or after a reset. figure 16 provides a diagram of the dual memory structure used to manage operation and store critical user settings. nonvol a tile flash memo r y (no spi access) manua l flash backu p st ar t -up reset vol a tile sram spi access 1 1051-016 figure 16 . sram and flash memory diagram www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 12 of 24 output data register s each sensor in the ADIS16445 has a dedicated output register in the user register map ( see table 6 ). figure 17 provides arrows, which describe the direction or rotation (g x , g y , g z ) and acceleration (a x , a y , a z ) that produces a positive response in the output data. gyroscopes xgyro_out ( see table 9 ) contains x - axis gyroscope data (g x in fi gure 17 ), ygyro _out ( see table 10 ) contains y - axis gyro - scope data (g y in figure 17) , and zgyro_out ( see table 11) contains z - axi s gyroscope data (g z in figure 17) . table 12 illust rates the gyroscope data format with numerical examples. table 9 . xgyro_out (base address = 0x04 ) , read o nly bits description [1 5 :0] x - axis gyroscope data, twos complement format, 100 lsb//sec (sens_avg[15:8] = 0x04) , 0/sec = 0x0000 table 10 . ygyro_out (base address = 0x06 ), read o nly bits description [1 5 :0] y - axis gyros cope data, twos complement format, 100 lsb//sec (sens_avg[15:8] = 0x04), 0/sec = 0x0000 table 11 . zgyro_out (base address = 0x08 ), read o nly bits description [ 1 5 :0] z - axis gyroscope data, twos complement format, 100 lsb//sec (s ens_avg[15:8] = 0x04), 0/sec = 0x0000 table 12 . rotation rate, twos complement format 1 rotation rate ( /sec ) decimal hex binary + 2 50 25,000 0x61a8 0110 0001 1010 1000 + 2 100 +2 0x0002 00 00 0000 0000 0010 + 1 100 +1 0x0001 00 00 0000 0000 0001 0 0 0x0000 00 00 0000 0000 0000 ? 1 100 ? 1 0x f fff 11 11 1111 1111 1111 ? 2 100 ? 2 0x f ffe 11 11 1111 1111 1110 ? 2 5 0 ? 25,000 0x9e58 1001 1110 0101 1000 1 sens_avg [15:8] = 0x04, see table 29. accelerometers xaccl_out ( see table 13 ) contains x - axis accelerometer data ( a x in figure 17 ), yaccl_out ( see table 14 ) contains y - axis accelerometer data (a y in figure 17 ) , and zaccl_out ( see table 15 ) contains z - axis accelerometer data (a z in figure 17 ). table 16 illu strates the accelerometer data format with numerical examples. table 13 . xaccl_out (base address = 0x0a ), read o nly bits description [1 5 :0] x - axis acceleration data, t wos complement format, 4000 lsb/ g , 0 g = 0x0000 table 14 . yaccl_out (base address = 0x0c ), read o nly bits description [1 5 :0] y - axis acceleration data, twos complement format, 4000 lsb/ g , 0 g = 0x0000 table 15 . zaccl_out (base address = 0x0 e ), read o nly bits descripti on [1 5 :0] z - axis acceleration data, twos complement format, 4000 lsb/ g , 0 g = 0x0000 table 16 . acceleration, twos complement format acceleration ( g ) decimal hex binary +5 20,000 0x4e20 0100 1110 0010 0000 + 2 4000 +2 0x0002 00 00 0000 0000 0010 + 1 4000 +1 0x0001 00 00 0000 0000 0001 0 0 0x0000 00 00 0000 0000 0000 ? 1 4000 ? 1 0x f fff 11 11 1111 1111 1111 ? 2 4000 ? 2 0x f ffe 11 11 1111 1111 1110 ? 5 ? 20,000 0xb1e0 1011 0001 1110 0000 www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 13 of 24 y -axis x-axis z-axis a z a y g y a x g x g z 1 1051-017 figure 17 . inertial sensor direction reference internal temperature the internal temperature measure ment data loads into the temp_out ( see table 17 ) register. table 18 illustrates the temperature data format. note that this temperature repre - sents an internal temperature reading, which does not precisely represe nt external conditions. the intended use of temp_out is to monitor relative changes in temperature. table 17 . temp_out (base address = 0x 1 8 ), read only bits description [ 15 :12] not used [11:0] twos complement, 0.07386c/lsb, 31 c = 0x000 table 18 . temperature, twos complement format temperature ( c ) decimal hex binary + 105 + 100 2 0x 3e a 0011 1110 10 10 + 85 + 731 0x 2db 0010 1101 1011 + 31.14771 + 2 0x 00 2 0000 0000 0010 + 31.07386 + 1 0x 0 0 1 0000 0000 0001 + 31 0 0x 0 0 0 0000 0000 0000 + 30.92614 ? 1 0x fff 1111 1111 1111 + 30.85229 ? 2 0x ffe 1111 1111 1110 ? 40 ? 962 0x c3e 1100 0011 1110 www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 14 of 24 s ystem f unctions global commands the glob_cmd register in table 19 provides trigger bits for software reset, flash memo ry management, and calibration control . start each of these functions by writing a 1 to the assigned bit in glob_cmd . after completing the task, the bit automati - cally returns to 0 . for example, set glob_cmd[7] = 1 (din = 0 x be 80) to initiate a software re set . set glob_ cm d[3] = 1 (din = 0x be 0 8 ) to back up the user register contents in nonvolatile flash . this sequence includes loading the control registers with the data in their respective flash memory locations prior to producing new data. table 19 . glob_cmd (base address = 0x 3e ), write o nly bits description (default = 0x0000) [15:8] not used 7 software reset [6: 4 ] not used 3 flash update 2 not used 1 factory calibration restore 0 gyroscope bias correction product identificati on the prod_id register in table 22 contains the binary equivalent of 16 , 44 5 . it provides a product - specific variable for systems that need to track this in their system software . the lot_id1 and lot_id2 registers in table 20 and table 21 , respectively, combine to provide a unique, 32- bit lot identification code . the serial_num register in ta ble 23 contains a binary number that represents the serial number on the device label . the assigned serial numbers in serial_num are lot specific. table 20 . lot_id1 (base address = 0x52), read only bits description [15:0] lot iden tification, binary code table 21 . lot_id2 (base address = 0x54), read only bits description [15:0] lot identification, binary code table 22 . prod_id (base address = 0x56), read only bits description (defau lt = 0x 40 3d ) [15:0] product identification = 0x 403d (16,445) table 23 . serial_num (base address = 0x58), read only bits description [15:1 2 ] reserved [1 1 :0] serial number, 1 to 4094 (0x ffe ) self - test function the msc _ ctrl regis ter in table 24 provides a self - test function for the gyroscopes and accele r ometers . this function allows the user to verify the mechanical integrity of each mems sensor. when enabled, the sel f test applies an elec trostatic force to each internal sensor element, which causes them to move . the move - ment in each element simulates its response to actual rotation/ acceleration and generates a predictable electrical response in the sensor outputs. set msc_ctrl[10] = 1 (d in = 0xb504) to activ ate the internal self - test routine, which compares the response to an expected range of responses and reports a pass/fail response to diag_stat[5]. if this bit is high, review diag_stat[15:10] to identify the failing sensor. table 24 . msc_ctrl (base address = 0x3 4 ), read/write bits description (default = 0x0006) [15:12] not used 11 check sum m emory test (cleared upon completion) 1 1 = enabled, 0 = disabled 10 internal self test (cleared upon completion) 1 1 = enabled, 0 = disabled [9 :8 ] do not use, always set to 00 7 not used 6 point of percussion, see figure 21 1 = enabled, 0 = disabled [5:3] not used 2 data ready enable 1 = enabled, 0 = disabled 1 data ready polarity 1 = active high when data is valid 0 = active low when data is valid 0 data ready line select 1 = dio2, 0 = dio1 1 the bit is automatically reset to 0 after finishing the test. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 15 of 24 status/error flags the diag_stat register in table 25 provides error flags for a number of functions . each flag uses 1 to indicate an error con - di tion and 0 to indicate a normal condition . reading this register provides access to the status of each flag and resets all of the bits to 0 for monitoring future operation . if the error condition remains, the error flag return s to 1 at the conclusion of the next sample cycle . diag_stat[0] does not require a read of this register to return to 0. if the power supply voltage goes back into range, this flag clear s automatically . the spi communication error flag in diag_stat[3] indicates that the number of sclks in a spi sequence did not equal a multiple of 16 sclks. table 25 . diag_stat (base address = 0x 3c ), read only bits description (default = 0x0000) 15 z - axis accelerometer self - test failure 1 = fail, 0 = pass 14 y - axis accelerometer self - test failure 1 = fail, 0 = pass 13 x - axis accelerometer self - test failure 1 = fail, 0 = pass 12 z - axis gyroscope self - test failure 0 = pass 11 y - axis gyroscope self - test failure 1 = fail, 0 = pass 10 x - axis gyroscope self - test failure 1 = fail, 0 = pass 9 alarm 2 status 1 = active, 0 = inactive 8 alarm 1 status 1 = active, 0 = inactive 7 not used 6 flash test, checksum flag 1 = fail, 0 = pass 5 self - test diagnostic error flag 1 = fail, 0 = pass 4 sensor overrange 1 = overrange, 0 = normal 3 spi communication failure 1 = fail, 0 = pass 2 flash update failure 1 = fail, 0 = pass [ 1 :0] not used memory management the fl ash_cnt register in table 26 provides a 16 - bit counter that helps track the number of write cycles to the nonvolatile flash memory. the flash updates every time a manual flash update occurs. a manual flash update i s initiated by the glob_cmd[3] bit and is performed at the completion of the glob_cmd[1:0] functions (see table 19). table 26 . flash_cnt (base address = 0x00), read only bits description [1 5:0] binary counter checksum test set msc_ctrl[11] = 1 (din = 0xb 5 08) to perform a check - sum test of the internal program memory. this function takes a summation of the internal program memory and compares it with the original summation value for the sa me locations (from factory configuration). if the sum matches the correct value, diag_stat[6] is equal to 0 . if it does not match, diag_stat[6] is equal to 1. make sure that the power supply is within specification for the entire 20 ms that this function takes to complete. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 16 of 24 input/output c onfiguration data ready indicator the data ready indicator provides a signal that indicates when the registers are updating, so that system proces sors can avoid data collision, a condition when internal register update s happen at the same time that an external processor requests it. the data ready signal has valid and invalid states. using the transition from invalid to valid to trigger an interrupt service routine provides the most time for data acquisition (before th e next register update). see figure 4 and table 2 for specific timing information. msc_ ctrl[2:0] ( s ee table 24 ) provide control bits for enabling this function, selecting the po larity of the valid state and i/o line assignment (dio1, dio2). the factory default setting of msc_ctrl[2:0] = 110 establishes dio1 as a data ready output line and assign s the valid state with a logic high (1) . s et msc_ctrl[2:0] = 100 (din = 0xb 4 04) to cha nge the polarity of the data ready signal on dio1 for interrupt inputs that require negative logic inputs for activation. general - purpose i nput /o utput dio1, dio2, dio3, and dio 4 are configurable, general - pur pose input/output lines that serve multipl e purp oses. the data ready controls in msc_ctrl [2:0 ] have the highest priority for configuring dio1 and dio2 . the alarm indicator controls in alm_ctrl[2:0 ] have the second highest priority for configuring dio1 and dio2 . the external clock control associated wi th smpl_prd [0] has the highest priority for dio4 configuration (see table 28 ). gpio_ctrl in table 27 has the lowest priority for configur ing dio1 , dio2 , and dio4 , and has a bsolute control over dio3. table 27 . gpio_ctrl (base address = 0x3 2 ), read/write bits description (default = 0x0000) [15:12] not used 11 general - purpose i/o line 4 (dio4) data level 10 general - purpose i/o line 3 (dio3) data leve l 9 general - purpose i/o line 2 (dio2) data level 8 general - purpose i/o line 1 (dio1) data level [7:4] not used 3 general - purpose i/o line 4 (dio4) direction control 1 = output, 0 = inpu t 2 general - purpose i/o line 3 (dio3) direction control 1 = ou tput, 0 = input 1 general - purpose i/o line 2 (dio2) direction control 1 = output, 0 = input 0 general - purpose i/o line 1 (dio1) direction control 1 = output, 0 = input example i nput /o utput configuration for example, set gpio_ctrl[3:0] = 0100 (din = 0xb 2 04) to set dio3 as an output signal pin and dio1, dio2 , and dio4 as input signal pins. set the output on dio3 to 1 by setting gpio_ctrl[10] = 1 (din = 0xb 3 04) . then, read gpio_ctrl [ 7:0 ] (din = 0x3 2 00) and mask off gpio_ctrl[9:8 ] and gpio_ctrl [11] to monitor the digital signal levels on dio4, dio2 , and dio1. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 17 of 24 d igital processing configura tion gyroscopes/accelerom eters figure 19 provides a diagram that describes all signal processing components for the gyroscopes and accelero meters. t he internal sampling system produces new data in the xgyro_out and xaccl_out output data registers at a rate of 819.2 sps. the smpl_p rd register in table 28 provides two functional controls that affect sam pling and register update rates . smpl_prd[12:8] provides a control for reducing the update rate, using an averaging filte r with a decimated output . these bits provide a binomial control that divides the data rate by a factor of 2 every time this number inc reases by 1 . for example, set smpl_prd[1 5 :8] = 0x04 (din = 0xb 7 0 4 ) to set the decimation factor to 16 . this reduces the update rate to 51.2 sps and the bandwidth to ~ 25 hz . t he smpl_prd [12:8] setting affect s the update rate for the temp_out register (see table 17) as well. table 28 . smpl_prd (base address = 0x3 6 ), read/write bits description (default = 0x0001) [15:13] not used [12:8] d, decimation rate setting, binomial , see figure 19 [7:1] not used 0 clock 1 = internal sampling clock, 819.2 sps 0 = external sampling clock input clock configur ation smpl_prd[0] (see table 28 ) provides a control for synchro - nizing the internal samplin g to an external clock source. set smpl_prd[0] = 0 (din = 0xb600) and gpio_ctrl[3] = 0 (din = 0xb200) to enable the external clock. see table 2 and figure 4 for timing information. digital filtering the sens_avg register in table 29 provides user controls for the low - pass filter. this filter contains two cascaded averaging filters that provide a bartlett window, fir filter respon se (see figure 19 ). for example, set sens_avg[2:0] = 100 (din = 0xb 8 04) to set each stage to 16 taps. when used with the default sample rate of 819.2 sps and zero decimation (smpl_prd[1 5 :8] = 0x00 ) , this value redu ces the sensor bandwidth to approximately 16 hz. 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 0.001 0.01 0.1 1 magnitude (db) frequenc y ( f / f s ) n = 2 n = 4 n = 16 n = 64 1 1051-018 figure 18 . bartlett window, fir filter frequency response (phase delay = n samples) dynamic range the sens_avg[10:8] bits provide three dynamic range settings for th e gyroscope s. the lower dynamic range settings ( 6 2.5 /sec and 1 25 /sec) limit the minimum filter tap sizes to maintain resolution. for example, set sens_avg[10:8] = 010 (din = 0xb 9 02) for a measurement range of 1 25 /sec. because this setting can influence the filte r settings, program sens_avg[10:8] before programming sens_avg[2:0] if more filtering is required. table 29 . sens_avg (base address = 0x 3 8 ), read/write bits description (default = 0x0402) [15:11] not used [10:8] measurement range (sensitivity) selection 100 = 2 50 /sec (default condition) 010 = 1 25 /sec, filter taps 4 (bits[2:0] 0x02) 001 = 6 2.5 /sec, filter taps 16 (bits[2:0] 0x04) [7:3] not used [2:0] filter s ize v ariable b number of taps in each stage; n b = 2 b see figure 18 for filter response mems sensor lo w -p ass fi l ter 330hz clock 819.2sps adc bartlett window fir fi l ter a verage/ decim a tion fi l ter externa l clock enabled by smpl_prd[0] = 0 gyroscopes lo w -p ass, two-pole (404hz, 757hz) accelerometers lo w -p ass, single-pole (330hz) b = sens_ a vg[2:0] n b = 2 b n b = number of t aps (per s t age) d = smpl_prd[12:8] n d = 2 d n d = number of t aps n d x(n) n = 1 1 n b n b x(n) n = 1 1 n b n b x(n) n = 1 1 n d n d 1 1051-019 fi gure 19 . sampling and frequency response block diagram www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 18 of 24 c alibration the mechanical structure and assembly process of the ADIS16445 provide excellent position and alignment stability for each sensor, even after subjected to temperature cycles, shock, vibration , and other environmental conditions . the factory calibration includes a dynamic characterization of each gyroscope and accelerometer over temperature and generates sensor specifi c correction formulas . gyroscopes the xgyro_ off ( see table 30 ), ygyro_ off ( see table 31) , and zgyro_ off ( see table 32 ) registers provide user - programmable bias adj ustment function for the x - , y - , and z - axis gyroscopes, respec tively. figure 20 illustrates that the y contain bias correction factors that adjust to the sensor data immediately be fore it loads into the output register. xgyro_off xaccl_off mems sensor adc f ac t or y calibr a tion and fi l tering xgyro_out xaccl_out 1 1051-020 figure 20 . user calibration, gyroscopes , and accelerometers gyroscope bias error estimation any system l evel calibration function must start with an estimate of the bias errors, which typi cally comes from a sample of gyro - scope o utput data, when the device is not in motion. the sample size of data depends on the accuracy goals . figure 7 provides a trade - off relationship between averaging time and th e expected accuracy of a bias measurement. vibration, thermal gradients, and power supply instability can influence the accuracy of this process. table 30 . xgyro_off (base address = 0x1 a ), read/write bits description (default = 0x0 000) [15 :0] x - axis, gyroscope offset correction factor, twos complement, 0.0025 /sec /lsb , 0 /sec = 0x0000 table 31 . ygyro_off (base address = 0x 1c ), read/write bits description (default = 0x0000) [15:0] y - axis, gyroscope offset correction factor, twos complement, 0.0025 /sec/lsb, 0/sec = 0x0000 table 32 . zgyro_off (base address = 0x 1e ), read/write bits description (default = 0x0000) [15:0] z - axis, gyroscope offset correction factor, twos complement, 0 .0025 /sec/lsb, 0/sec = 0x0000 gyroscope bias correction factors when the bias estimate is complete, multiply the estimate by ? 1 to change its polarity, convert it into digital format for the offset correct ion registers ( see table 30 , table 31 , and table 32) , and write the correction fac tors to the correction registers. for example, lower the x - axis bias by 10 lsb ( 0.025 /sec) by setting xgyro_off = 0x1ff6 (din = 0x9 b 1f, 0x9 a f6). single command bias correction glob_cmd[0] ( see table 19) loads the xgyro_off registers with the values that are the opposite of the values that are in xgyro_o ut, at the time of initiation. use this command, together with the decimation filter (smpl_prd[12:8], see table 28 ) , to au tomatically average the gyroscope data and improve the accuracy of this function , as follows: 1. set sens_avg[10:8] = 001 (din = 0xb 9 01) to optimize the xgyro_out sensitivity to 0.0025 / sec/lsb. 2. s et smpl_prd[1 2 :8] = 0x10 (din = 0x b 7 10) to set the decimation rate to 65,536 (2 16 ), which provides an averaging time of 80 seconds (65 , 536 819.2 sps) . 3. wait for 80 seconds while keeping the device motionless. 4. s et glob_cmd[0] = 1 (din = 0x b e 01) and wait for the t ime it takes to perform the flas h memory back up . accel erometers the xaccl_o ff ( see table 33 ), yac cl _o ff ( see table 34 ), and zaccl_o ff ( see table 35 ) registers provide user programmable bias a djustment function for the x - , y - , and z - axis accelerometers, respectively. these registers adjust the accelerometer data in the same manner as xgyro_off in figure 20. table 33 . xacc l_off (base address = 0x2 0 ), read/write bits description (default = 0x0000) [1 5 :0] x - axis, accele rometer offset correction factor, t wos complement, 0.25 m g /lsb , 0 g = 0x0000 table 34 . yaccl_off (base address = 0x2 2 ), read/write b its description (default = 0x0000) [15:14] not used [13:0] y - axis, accelerometer offset correction facto r, twos complement, 0.25 m g /lsb, 0 g = 0x0000 table 35. z accl_off (base address = 0x2 4 ), read/write bits description (defaul t = 0x0000) [15:14] not used [13:0] z - axis, accelerometer offset correction factor , twos complement, 0.25 m g /lsb, 0 g = 0x0000 accelerometer bias error estimation under static conditions, orient each accelerometer in positions where the response to gra vity is predictable. a common approach is to measure the response of each accelerom eter when they are oriented in peak response positions, that is, where 1 g is the idea l measurement position . next , average the +1 g and ? 1 g accelerometer measurements together to estimate the residual bias error. using more points in the rotation can improve the accuracy of the response. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 19 of 24 accelerometer bias correction factors when the bias estimate is complete, multiply the estimate by ? 1 to change its polarity, convert it to the digital format for the offset correction registers ( see table 33, table 34 or table 35) , and write the correction factors to the correction registers. for example, lower the x - ax is bias by 1 2 lsb ( 3 m g ) by setting xaccl_off = 0x fff4 (din = 0x a 1 ff , 0x a 0 f 4 ). point of percussion alignment set msc_ctrl[6] = 1 (din = 0xb 4 46) to enable this featu re and maintain the factory default settings for dio1. this feature performs a point of percussion translation to the point identified in figure 21 . see table 24 for more i nformation on msc_ctrl. origin alignment reference point see msc_ctrl[6]. 1 1051-021 figure 21 . point of percussion physical reference flash updates when using the user calibration registers to optimize system level accuracy, set glob_cmd[3] = 1 (din = 0x be 04) to save these settings in no n volatile flash memory. be sure to consider the endurance rating of the flash memory when determining how often to update the user correction factors in the flash memory. restoring factory ca libration set glob_cmd[1] = 1 (din = 0x be 02) to execute the facto ry calibration restore function , which resets the gyroscope and accel - erometer offset register s to 0x 0000 and all sensor data to 0 . then, it automatically updates the flash memory and re starts sampling and processing data . see table 19 for information on glob_cmd. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 20 of 24 a larms alarm 1 and alarm 2 provide two independent alarms with programmable levels, polarity , and data sources. static alarm use the static alarms setting compares the data source selection (alm_ctrl [15:8]) with the values in the alm_magx registers listed in table 36 and table 37 , using alm_magx[15] to deter - mine the trigger polarity . the data format in these registers matches the format of the data selection in alm_ctrl[15:8]. see table 41, alarm 1, for a static alarm configuration example. table 36 . alm_mag1 (base address = 0x4 0 ), read/write bits descri ption (default = 0x0000) [1 5 :0] threshold setting; matches for format of alm_ctrl[11:8] output register selection table 37 . alm_mag2 (base address = 0x4 2 ), read/write bits description (default = 0x0000) [1 5 :0] threshold setting; matches for format of alm_ctrl[15:12] output register selection dynamic alarm use the dynamic alarm setting monitors the data selection for a rate - of - change compariso n . the rate - of - change comparison is represented by the magnitude in the alm_magx register s over the time represented by the number - of - samples setting in the alm_smplx registers, located in table 38 and table 39 . see table 41 , alarm 2, for a dynamic alarm configuration example. table 38 . alm_smpl1 (base address = 0x 44 ), read/write bits description (default = 0x0000) [15:8] not used [7:0] binary, number of samples (both 0x00 and 0x01 = 1) table 39 . alm_smpl 2 (base address = 0x4 6 ), read/write bits description (default = 0x0000) [15:8] not used [7:0] binary, number of samples (both 0x00 and 0x01 = 1) alarm r eporting the diag_stat[9 :8 ] bits provide error flags that indicate an alarm condi tion. the alm_ctrl[2:0] bits provide controls for a hardware indicator using dio1 or dio2. table 40 . alm_ctrl (base address = 0x4 8 ), read/write bits description (default = 0x0000) [15:12] alarm 2 data source selection 0000 = di sable 0001 = xgyro_out 0010 = y gyro_out 001 1 = z gyro_out 0 100 = xaccl_out 010 1 = y accl_out 0110 = z accl_out [11:8] alarm 1 data source selection (same as alarm 2) 7 alarm 2, dynamic/static (1 = dynamic, 0 = static) 6 alarm 1, dynamic/static (1 = dynamic, 0 = static) 5 alarm 2, polarity (1 = greater than alm_mag2) 4 alarm 1, polarity (1 = greater than alm_mag1) 3 data source filtering (1 = filtered, 0 = unfiltered) 2 alarm indicator (1 = enabled, 0 = disabled) 1 alarm indicator active pol arity (1 = high, 0 = low) 0 alarm output line select (1 = dio2, 0 = dio1) alarm example table 41 offers an example that configures alarm 1 to trigger when filtered zaccl_out data drops below 0.7 g , and alarm 2 to trigger when filtered zgyro_out data changes by more than 50 /sec over a 100 ms period , or 500 /sec 2 . the filter setting helps reduce false triggers from noise and refine s the accuracy of the trigger poin ts . the alm_smpl2 setting of 8 2 samples provides a comparison period that is approximately equal to 100 ms for an internal sample rate of 819.2 sps . table 41 . alarm configuration example din description 0x cd 36, alm_ctrl = 0x 36af 0x cc af alarm 2: dynamic, - zgyro_out ( - time, alm_smpl2) > alm_mag2 alarm 1 : static, zaccl_out < alm_mag1, f iltered data di o2 output indicator, positive polarity 0x c7 13, 0x c6 88 alm_mag 2 = 0x 1388 = 5000 lsb = 50 / sec 0x c5 0 a , 0x c4 f0 alm_mag 1 = 0x0 af0 = 2800 lsb = + 0. 7 g 0x c8 6 6 alm_smpl2[7:0] = 0x 52 = 82 samples 82 samples 819.2 sps = ~100 ms www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 21 of 24 applications informa tion power s upply c onsiderations t he power supply must be within 3.15 v and 3.45 v for normal oper ation and optimal performance. during start up, the internal pow er conversion system start s drawing current when vdd reaches 1.6 v. the internal processor begin s initializing when vdd is equal to 2.35 v. after the processor starts, vdd must reach 2.7 v within 128 ms. also, make sure that the power supply drops below 1. 6 v to shut the device down. figure 9 shows a 10 f capacitor on the power supply. using this capacitor supports optimal noise performance in the sensors. ADIS16445 /pcbz the ADIS16445 /pcbz includes one ADIS16445 amlz , one interface pcb, and one flexible connector/cable. this particular flexible cable mates the ADIS16445amlz to any system that is currently using the adis1636x, adis16375 , adis16385 , adis1640x , or adis1648x imu products, which use a 24 - pin interface, rather than the 20 - pin interface that the adis1644 5 uses. this combination of components enables quicker install - ation for prototype evaluation and algorithm development. figure 22 provides a mechan ical design example for using these three components in a system. ADIS16445amlz inter f ace pcb 33.40mm 23.75mm 20.15mm 30.10mm 10.07mm 15.05mm j1 1 1 1 1 1 1 12 2 12 2 j2 notes 1. use four m2 machine screws t o a tt ach the ADIS16445. 2. use four m3 machine screws t o a tt ach the inter f ace pcb. flexible connec t or/cable 15mm t o 45mm 1 1051-022 figure 22 . physical diagram for mounting the ADIS16445 /pcbz figure 23 pro vides the pin assig nments for the interface board. 1 2 3 4 5 6 7 8 9 10 1 1 12 dnc dnc dnc dnc dio2 dnc dnc dio1 dio4 dio3 gnd j2 gnd 2 4 6 8 10 1 3 5 7 9 1 1 12 rst cs gnd gnd vdd gnd vdd vdd din dout sclk j1 dnc 1 1051-023 figure 23 . j1/j2 pin assignments for interface pcb installation the following steps provide an example installation process for using these three components: ? drill and tap m2 and m3 holes in the system frame, according to the locations in figure 22. ? install the ADIS16445 using m2 machine screws. use a mounting torque of 25 inch - ounces. ? install the interface pcb using m3 machine screws. ? connect j1 on the interface flex to the ADIS16445 amlz connector. ? connect j2 on the interface flex to j3 on the interface pcb. note that j2 (interface flex) has 20 pins and j3 (int erface pcb) has 24 pins. make sure that pin 1 on j2 (interface flex) connects to pin 20 on j3 (interface pcb). j3 has a pin 1 indicator to help guide this connectio n. ? use j1 and j2 on the interface pcb to make the electrical connection with the system sup ply and embedded pro - cessor, using 12 - pin, 1 mm ribbon cable s . the following parts may be useful in building this type of cable: 3m part number 152212 - 0100 - gb (ribbon crimp connector) and 3m part number 3625/12 (ribbon cable). the c1/c2 pads on the int erface pcb do not have capacitors on them, but these pads can support the suggested pow er supply capacitor of 10 f (s ee figure 9 ) . pc - b ased e valuation t ools the e va l - adis support s pc - based evaluation of the ADIS16445 . go to www.analog.com/eval - adis , to down - load the u ser g uide ( ug - 287 ) and software (imu e valuation). m ounting approaches mounting , connector up the ADIS16445 supports both connector - up and connector - down mounting approaches. figure 24 offers an example of a connector - up mounting approach, which uses a flexible interface cable for the electrical connection. the connector - up approach provides a simple mechanical design , but requires th e use of a flexible connector. when connecting to legacy systems that use other analog devices imu products (adis163xx/ adis16 4xx), the connector - up method may be the simplest approach for migrating to the ADIS16445 . figure 22 provide an example for the me chanical design that uses a connector - up mounting approach. flexible cable/connec t or 1 1051-024 figure 24 . connector - up mounting example www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 22 of 24 mounting, connector down the connector - down approach requires a little more complexity in the pcb design, but eliminates the need for the flexible connector. the bottom side of the ADIS16445amlz package accommodates m2 machine screws that have a head diameter of 3.5 mm and a countersink angle of 45. figure 25 provides a graphical example of a connector - down mounting approach . this example uses countersunk m2 0.4 mm 12 mm machine screws to secure the ADIS16445amlz t o a bulkhead, which is below the pcb that contains the mating connector. figure 26 provides a design example for this pcb. when finalizing this design for a particular pcb vendor, follow the vendor design rules t o make sure that the top of the ADIS16445amlz package slide s through the cutout after pcb fabrication. when using the alignment holes associated with the mating connector (clm - 11 0 - 02- lm - d - a, samtec) and m2 m achine screws for the mounting hardware, the 2.4 mm mounting hole diameter provides sufficient flexibility to account for tolerance in connector location (on both the ADIS16445amlz and in the mating pcb). for more information and design tools, visit the package and resources section available at www.analog.com/ adis1644 5 . 1 1051-025 figure 25 . connect or - down mounting example 1.600 24.850 23.250 22.500 20.500 4.350 2.350 2.350 4.350 6.355 1 1.355 13.355 30.775 34.584 35.747 2.653 1.760 0.915 1.370 20 0.390 18 1.163 0.915 2 8.425 4.967 5.772 0.610 20 16.425 22.197 5 ?2.400 4 r2.750 2 ?0.635 2 1 1051-026 figure 26 . connector - down pcb design example www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADIS16445 rev. 0 | page 23 of 24 outline dimensions 10-02-2012-a top view end view 33.40 bsc 30.10 bsc 8.296 bsc 6.290 bsc 19.55 bsc 12.50 bsc 0.66 bsc 2.00 bsc 2.30 bsc (2 plcs) 2.30 bsc (2 plcs) 1.00 bsc 2.00 bsc 7.57 bsc 10.23 bsc 1.00 bsc pitch 20.150 bsc 11.10 10.80 10.50 7.89 7.63 7.37 4.70 4.50 4.30 2.60 2.40 dia. 2.20 2.96 2.70 2.44 38.08 37.70 37.32 24.53 24.15 23.77 figure 27 . 20 - lead module with connector interface [module] (ml - 20 - 3) dimensions shown in millimeters ordering guide model 1 temperature range package description package option ADIS16445 a mlz ? 40c to + 8 5 c 2 0 - lead module with connector interface [module] ml -20 -3 ADIS16445 /pcbz interface pcb 1 z = rohs compliant part. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADIS16445 data sheet rev. 0 | page 24 of 24 notes ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d11051 - 0- 10/12(0) www.datasheet.net/ datasheet pdf - http://www..co.kr/

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